Mohit had completed his B.E. in Electronics and Communication Engineering from IIST Indore affiliated to RGPV Bhopal in the year 2013. After that, he worked as Lecturer for about nine months at SGSITS Indore. Then in 2014 he joined IIT Indore to complete his masters. During his masters, he worked on the thesis titled “Current Mode Logic based Asynchronous SerDes Transceivers,” under the guidance of Dr. S.K. Vishvakarma. His paper has been published in IEEE VLSI Circuit and System Letters. He has strong interest towards VLSI circuit design and simulations. To continue his thrust for research, he joins IITB-Monash Academy in the year 2016 to persue his Ph.D. At IITB he is working with Prof. Maryam Shojaei Barghini (IITB) and Prof. Jean-Michel Redouté (Monash University).
Link to student’s project: IMURA0647